Verilog practice / Problem 4
2-to-4 decoder with enable
When en is 1, exactly one bit of y is high: bit number a. When en is 0, y is all zeros. For example, a = 2 with en = 1 gives y = 4'b0100.
Ports
| Name | Direction | Bits |
|---|---|---|
a | input | 2 |
en | input | 1 |
y | output | 4 |
How it's checked
The test tries the input combinations and checks every output for each one.
Stuck? Read the lesson Decoders and priority encoders.
decoder2to4.vCtrl + Enter runs