Verilog practice / Problem 5
Full adder
Add three single bits a, b and cin. s is the sum bit and cout is the carry out. For example, 1 + 1 + 1 gives s = 1 and cout = 1.
Ports
| Name | Direction | Bits |
|---|---|---|
a | input | 1 |
b | input | 1 |
cin | input | 1 |
s | output | 1 |
cout | output | 1 |
How it's checked
The test tries the input combinations and checks every output for each one.
Stuck? Read the lesson Half, full and ripple adders.
full_adder.vCtrl + Enter runs