Verilog practice / Problem 17
Count the ones
count is the number of 1 bits in d. It can be anything from 0 to 8, so it needs 4 bits. A for loop inside always @(*) is one clean way to write it.
Ports
| Name | Direction | Bits |
|---|---|---|
d | input | 8 |
count | output | 4 |
How it's checked
The test tries the input combinations and checks every output for each one.
Stuck? Read the lesson Binary, hex and two's complement.
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